Implementing combined finite state machine with heterogeneous field programmable gate array
The subject of research in this article is the logical circuit of the combined finite state machine (CFSM), which combines the functions of both finite state machine Mealy and Moore. The article considers the problem of logical optimization of the CFSM implemented in field programmable gate array (F...
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Published in | 2018 14th International Conference on Advanced Trends in Radioelecrtronics, Telecommunications and Computer Engineering (TCSET) pp. 1184 - 1187 |
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Main Author | |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.02.2018
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Subjects | |
Online Access | Get full text |
DOI | 10.1109/TCSET.2018.8336406 |
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Summary: | The subject of research in this article is the logical circuit of the combined finite state machine (CFSM), which combines the functions of both finite state machine Mealy and Moore. The article considers the problem of logical optimization of the CFSM implemented in field programmable gate array (FPGA) basis. The CFSM scheme is implemented in table-type elements and embedded memory blocks. The number of elements in the scheme depends on the combination of the parameters of the CFSM. The article proposes a method for CFSM optimization by area using the heterogeneous FPGA with embedded memory. |
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DOI: | 10.1109/TCSET.2018.8336406 |