Conducted emission reduction technology for liquid crystal display devices
High Resolution LCD TVs adopt a Gate In Panel (GIP) technology for cost reduction and narrow bezel design. GIP is a panel with a built-in gate drive IC. It increases circuit current and components and gets worse Conducted Emission (CE). This paper presents analysis and improvement of CE in the LCD T...
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Published in | 2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI) pp. 65 - 67 |
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Main Authors | , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.08.2017
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Subjects | |
Online Access | Get full text |
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Summary: | High Resolution LCD TVs adopt a Gate In Panel (GIP) technology for cost reduction and narrow bezel design. GIP is a panel with a built-in gate drive IC. It increases circuit current and components and gets worse Conducted Emission (CE). This paper presents analysis and improvement of CE in the LCD TV with GIP. One of the main sources of CE is Gate Clock (GCLK) which operates the gate circuit of LCD TV with GIP. The source of CE noise from the GCLK is related with the waveform. It is strongly dependent on rising / falling time and the amplitude of ripples. To increase the rising / falling time can reduce CE noise. In addition, another parameter of CE noise is peak current for operating a display. Peak current is the highest when the output time of Source driver and Gate driver is synchronized. Distributing the output timing of Source driver and Gate Driver has effect for reducing CE noise. |
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ISBN: | 9781538622292 1538622297 |
ISSN: | 2158-1118 |
DOI: | 10.1109/ISEMC.2017.8077993 |