Enumeration of Costas Arrays Using GPUs and FPGAs

The enumeration of Costas arrays is a problem that grows factorially with input size and that has lately been completed for sizes up to 28 using computer clusters. This paper presents designs for solving this problem using, separately, GPUs and FPGAs. Both implementations rely on Costas array symmet...

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Bibliographic Details
Published in2011 International Conference on Reconfigurable Computing and FPGAs pp. 462 - 467
Main Authors Arce-Nazario, R. A., Ortiz-Ubarri, J. R.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.11.2011
Subjects
Acceleration
Algorithm design and analysis
Arrays
backtracking
Costas arrays
Field programmable gate arrays
FPGA
GPU
Graphics processing unit
Instruction sets
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Summary:The enumeration of Costas arrays is a problem that grows factorially with input size and that has lately been completed for sizes up to 28 using computer clusters. This paper presents designs for solving this problem using, separately, GPUs and FPGAs. Both implementations rely on Costas array symmetries to reduce the search space and perform concurrent explorations over the remaining candidate solutions. The fine grained parallelism utilized to evaluate and progress the exploration, coupled with the additional concurrency provided by the multiple instanced cores allowed the FPGA (XC5VLX330-2) implementation to achieve speedups of up to 40× over the GPU (GeForce GTX 480). Estimates for bigger sizes, up to N = 28 indicate a speedup of 4.44× over the fastest reported software implementation.
ISBN:9781457717345
1457717344
ISSN:2325-6532
2640-0472
DOI:10.1109/ReConFig.2011.36