A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput

A 90 nm 4 Mb embedded phase-change memory (PCM) is presented, demonstrating the feasibility of PCM integration with 3 masks overhead in a 6-ML standard CMOS process. Using a low-voltage NMOS transistor as a cell selector leads to a 0.29 ¿m 2 cell size. A 1.2 V low-voltage read operation achieves a 1...

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Published in2010 IEEE International Solid-State Circuits Conference - (ISSCC) pp. 268 - 269
Main Authors De Sandre, G., Bettini, L., Pirola, A., Marmonier, L., Pasotti, M., Borghi, M., Mattavelli, P., Zuliani, P., Scotti, L., Mastracchio, G., Bedeschi, F., Gastaldi, R., Bez, R.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.02.2010
Subjects
Circuits
Decoding
MOS devices
Nonvolatile memory
Phase change materials
Phase change memory
Read-write memory
Switches
Throughput
Voltage
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Summary:A 90 nm 4 Mb embedded phase-change memory (PCM) is presented, demonstrating the feasibility of PCM integration with 3 masks overhead in a 6-ML standard CMOS process. Using a low-voltage NMOS transistor as a cell selector leads to a 0.29 ¿m 2 cell size. A 1.2 V low-voltage read operation achieves a 12 ns access time. The 3 mm 2 macro features a random write throughput of 1 MB/s and a mode to increase write throughput to 4 MB/s.
ISBN:1424460336
9781424460335
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2010.5433911