Highly sensitive CMOS passive wake-up circuit
We implement a passive wake-up circuit with high voltage sensitivity using standard CMOS technology. We propose voltage multipliers and inverter chain optimized for high voltage sensitivity. The wake-up circuit converts small RF input signals into a DC signal to trigger the interrupt. Using an RF in...
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Published in | 2008 Asia-Pacific Microwave Conference pp. 1 - 4 |
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Main Authors | , , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.12.2008
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Subjects | |
Online Access | Get full text |
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Summary: | We implement a passive wake-up circuit with high voltage sensitivity using standard CMOS technology. We propose voltage multipliers and inverter chain optimized for high voltage sensitivity. The wake-up circuit converts small RF input signals into a DC signal to trigger the interrupt. Using an RF input signal, whose center frequency is 870 MHz and input power is -29.3 dBm, we achieved an output voltage of 0.7 V, enough to trigger on the output. The fully integrated CMOS IC is fabricated using a 0.18 mum standard CMOS process. The chip area is as small as 230 times 190 mum 2 . |
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ISBN: | 9781424426416 1424426413 |
ISSN: | 2165-4727 2165-4743 |
DOI: | 10.1109/APMC.2008.4958344 |