A sub-threshold ultra-low power low-dropout regulator
In this paper, a wide range low dropout (LDO) with low current consumption is presented. The circuitry is constructed by a sub-threshold voltage error amplifier (EA). The transistors of EA operate in the sub-threshold region, which allows a remarkable reduction in the minimum supply voltage and curr...
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Published in | 2017 International SoC Design Conference (ISOCC) pp. 214 - 215 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.11.2017
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Subjects | |
Online Access | Get full text |
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Summary: | In this paper, a wide range low dropout (LDO) with low current consumption is presented. The circuitry is constructed by a sub-threshold voltage error amplifier (EA). The transistors of EA operate in the sub-threshold region, which allows a remarkable reduction in the minimum supply voltage and current consumption. In the condition of input voltage 2 ∼ 5V, output voltage 1.8 V, load capacitor 4.7μΕ, and load current 100 mA, the current consumption of the LDO is 3.6 μΑ. The output LDO can be adjusted from 1.6 V to 2.15 V by the 4 bit trimming step of 50 mV. The propose LDO is implement in CMOS 110 nm technology using UMC's process with the active die size of 222 μm × 184 μm. |
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DOI: | 10.1109/ISOCC.2017.8368859 |