Design of a high linearity low noise mixer for low voltage application

A 1.2V Gilbert mixer with improved linearity and noise figure is presented. To improve the linearity, an optimum gate bias is applied to the transconductance stage, and a series LC network resonating around 2f LO is implemented at the common source nodes of the switch quad. Analysis shows that the f...

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Bibliographic Details
Published in2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology pp. 653 - 655
Main Authors Song Hu, Weinan Li, Yumei Huang, Zhiliang Hong
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.11.2010
Subjects
1f noise
Harmonic analysis
Linearity
Mixers
Noise figure
Switches
Transconductance
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Summary:A 1.2V Gilbert mixer with improved linearity and noise figure is presented. To improve the linearity, an optimum gate bias is applied to the transconductance stage, and a series LC network resonating around 2f LO is implemented at the common source nodes of the switch quad. Analysis shows that the flicker noise performance also benefits from the series resonating network. The 2.1GHz mixer fabricated with 0.13μm CMOS technology is demonstrated. Linearity measurement from two tone tests shows that the IMD3 is improved over a wide range of the input power level. Compared with the conventional Gilbert mixer, the IMD3 is improved by 13.1dB and the DSB noise figure measured at 1MHz intermediate frequency is improved by 3.7dB. The mixer consumes 3.5mA current from a 1.2V supply voltage.
ISBN:9781424457977
1424457971
DOI:10.1109/ICSICT.2010.5667292