Low-power self-equalizing driver for silicon carrier interconnects with low bit error rate

This paper demonstrates and compares the power efficiency of a standard differential current mode driver operating over an FR-4 channel with an improved driver with pre-emphasis operating over a silicon carrier channel. The drivers were designed for a 45 nm process, and both achieved a bit error rat...

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Bibliographic Details
Published in2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems pp. 37 - 40
Main Authors Gadfort, P., Franzon, P.D.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2009
Subjects
Bit error rate
Copper
Cutoff frequency
Digital systems
Driver circuits
Integrated circuit interconnections
Packaging
Propagation delay
Radio frequency
Silicon
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Summary:This paper demonstrates and compares the power efficiency of a standard differential current mode driver operating over an FR-4 channel with an improved driver with pre-emphasis operating over a silicon carrier channel. The drivers were designed for a 45 nm process, and both achieved a bit error rate of 10 -15 errors per bit while operating at 4 Gbps. The power of the improved driver was reduced to one-fourth that of the standard driver through the utilization of the silicon carrier channels and pre-emphasis.
ISBN:9781424444472
1424444470
ISSN:2165-4107
DOI:10.1109/EPEPS.2009.5338482