Two Level Cost-Quality Optimization of 9-7 Lifting-Based Discrete Wavelet Transform

Implementing the discrete wavelet transform, which is being increasingly recognized in image/video compression standards, in hardware is highly area-consuming. In this paper, a new high-performance lifting-based architecture with optimized error vs. hardware cost is proposed for the 9-7 DWT. In the...

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Bibliographic Details
Published in2007 IEEE International Conference on Image Processing Vol. 6; pp. VI - 217 - VI - 220
Main Authors Aminlou, A., Refan, F., Hashemi, M.R., Fatemi, O.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2007
Subjects
Computer architecture
constant multiplier
Cost function
Discrete wavelet transform
Discrete wavelet transforms
Embedded system
Embedded systems
Engines
Hardware
Laboratories
lifting-based architecture
Optimization methods
Quantization
Video compression
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Summary:Implementing the discrete wavelet transform, which is being increasingly recognized in image/video compression standards, in hardware is highly area-consuming. In this paper, a new high-performance lifting-based architecture with optimized error vs. hardware cost is proposed for the 9-7 DWT. In the proposed architecture each constant coefficient multiplier of the conventional lifting structure is split into two new constant multipliers in order to minimize the hardware implementation cost and quantization error. Using an optimization process the appropriate coefficients are determined according to the hardware cost and quality requirements of each application. Simulation results indicate an average quality improvement of 13.5 dB with the same hardware resources. For achieving the same quality, it requires 40% less hardware resources, which makes it suitable for embedded systems.
ISBN:9781424414369
1424414369
ISSN:1522-4880
2381-8549
DOI:10.1109/ICIP.2007.4379560