Vector-logical diagnosis method for SOC functionalities

Models and methods of vector-logical diagnosis of SoC functionalities in real time are proposed. Algebra-logical procedures of embedded fault diagnosis by means of DNF synthesis that forms all functionality diagnosis solutions are described. The method is based on use the fault detection table that...

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Bibliographic Details
Published inProceedings of IEEE East-West Design & Test Symposium (EWDTS'08) pp. 159 - 162
Main Authors Hahanov, Vladimir, Guz, Olesya, Kulbakova, Natalya, Davydov, Maxim
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2008
Subjects
Electrical fault detection
Fault detection
Fault diagnosis
Integrated circuit modeling
System-on-a-chip
Testing
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Summary:Models and methods of vector-logical diagnosis of SoC functionalities in real time are proposed. Algebra-logical procedures of embedded fault diagnosis by means of DNF synthesis that forms all functionality diagnosis solutions are described. The method is based on use the fault detection table that is result of fault simulation.
ISBN:1424434025
9781424434022
DOI:10.1109/EWDTS.2008.5580136