Towards Dependability-Aware Design of Hardware Systems Using Extended Program State Machines

• Published in: 2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops pp. 181 - 188
• Main Authors: Gruttner, K, Herrholz, A, Kuhne, U, Grosse, D, Rettberg, A, Nebel, W, Drechsler, R
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.03.2011
• Subjects: Adaptation model; Circuit faults; Computational modeling; Computer architecture; Fault tolerance; Hardware; Switches
• ISBN: 9781457703034; 1457703033
• DOI: 10.1109/ISORCW.2011.27

Due to the continuous shrinking of the transistor sizes which is strongly driven by Moore's law, reliability becomes a dominant design challenge for embedded systems. Reliability problems arise from permanent errors due to manufacturing, process variations, aging as well as soft errors. As a result, the hardware will consist of unreliable components and hence, the development of embedded systems has to change fundamentally. Therefore, we propose a dependability-aware design approach for hardware systems through integrating dependability into a state-of-the-art system-level design language. Our approach is based on SystemC and extends the Program State Machine model to explicitly observe, diagnose, and compensate faulty behavior. Different compensation mechanisms like run-time reconfiguration or mechanisms for error propagation can be used by the designer during refinement. They are controlled by a new exception-like mechanism. Furthermore, our approach aims to integrate functional verification as well as dependability verification with respect to given fault models.