Product Yield Prediction System and Critical Area Database

Pre-silicon yield estimators for ASIC products have the potential for improved accuracy based on retrospective critical area and yield analysis of completed designs. A prototype closed-loop system, in which a database of observed yield and computed critical areas is continuously compiled and updated...

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Bibliographic Details
Published in2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference pp. 351 - 355
Main Authors Barnett, T.S., Bickford, J., Weger, A.J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2007
Subjects
Circuit faults
CMOS technology
critical area analysis
Integrated circuit modeling
Integrated circuit yield
Investments
Microelectronics
Predictive models
Semiconductor device modeling
Virtual manufacturing
yield learning
yield modeling
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Summary:Pre-silicon yield estimators for ASIC products have the potential for improved accuracy based on retrospective critical area and yield analysis of completed designs. A prototype closed-loop system, in which a database of observed yield and computed critical areas is continuously compiled and updated, is described in this paper. The database allows a yield model based on circuit content, which is available at the time of quote, but before the physical layout, to be optimized to more accurately reflect a technology's random defect sensitivities. Confining ones observations to the mature 130-nm technology minimizes the inclusion of systematic defects in the observed yield, and allows for a more complete view of the random defect component of yield loss.
ISBN:9781424406524
1424406528
ISSN:1078-8743
2376-6697
DOI:10.1109/ASMC.2007.375062