Temperature-limited microprocessors: Measurements and design implications
The details of the power distribution of state of the art CMOS chips (e.g., local regions of high power (or hotspots), which disproportionally drive up junction temperatures) can have a severe impact on reliability, manufacturing yield and chip performances. In this paper we discuss the results of a...
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Published in | 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) pp. 427 - 432 |
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Main Authors | , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.01.2007
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Subjects | |
Online Access | Get full text |
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