GPU Approach to FPGA placement based on star

While simulated-annealing is currently the most widely used method for performing FPGA placement, it does not scale to very large designs. Modern many-core architectures (including GPUs) offer a promising alternative to traditional multi-core processors for improving runtime performance. In this wor...

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Bibliographic Details
Published in10th IEEE International NEWCAS Conference pp. 229 - 232
Main Authors Fobel, C., Grewal, G., Collier, R., Stacey, D.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2012
Subjects
Annealing
Benchmark testing
Field programmable gate arrays
Graphics processing unit
Parallel processing
Runtime
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Summary:While simulated-annealing is currently the most widely used method for performing FPGA placement, it does not scale to very large designs. Modern many-core architectures (including GPUs) offer a promising alternative to traditional multi-core processors for improving runtime performance. In this work, we propose a GPU-accelerated simulated-annealing variant for FPGA placement. Our approach uses the Star+ wirelength model along with a novel method of efficiently generating large sets of independent swap operations, providing a high level of parallelism. Speedups from 5.4-89.2× (median 20.2×) were achieved over a single-core CPU-only implementation.
ISBN:1467308579
9781467308571
DOI:10.1109/NEWCAS.2012.6328998