Functional Test Selection for High Volume Manufacturing

• Published in: Seventh International Workshop on Microprocessor Test and Verification (MTV'06) pp. 15 - 19
• Main Authors: Gangaram, V., Bhan, D., Caldwell, J.K.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2006
• Subjects: Automatic testing; Computational modeling; Design Validation; Fault detection; Fault diagnosis; Fault Simulation Acceleration; Frequency; Functional Test Sequences; Manufacturing; Microprocessors; Semiconductor device manufacture; Semiconductor device testing; Test Sequence Compaction; Untestable Fault Identification; Vehicle dynamics
• ISBN: 0769528392; 9780769528397
• ISSN: 1550-4093; 2332-5674
• DOI: 10.1109/MTV.2006.12

Validation and legacy test suites are often reused for achieving at speed coverage required for testing high frequency semiconductor chips. Porting validation tests to high volume manufacturing (HVM) flows involves extensive manual effort but is required to ensure high quality chips. Functional test selection is the problem of choosing a subset of tests from a large pool of existing tests to maximize the fault coverage while minimizing the test data volume, fault grading time and porting effort. We formulate a framework for test selection that allows various coverage metrics to be used for evaluation. A novel dynamic untestability analysis method is proposed to identify faults that can not be detected by a given test sequence. Conversely this method can be used to compute tight upper bound coverage and hence as a metric for functional test evaluation. Test selection using this new metric gives significant additional fault coverage than toggle based test selection.