Ta2O5 Interfacial Layer between GST and W Plug enabling Low Power Operation of Phase Change Memories

A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., current and voltage) for the cell is significantly reduced by inserting a very thin Ta 2 O 5 film between GeSbTe (GST) and a W plug. The Ta 2 O 5 interfacial layer works not only as...

Full description

Saved in:
Bibliographic Details
Published in2006 International Electron Devices Meeting pp. 1 - 4
Main Authors Matsui, Y., Kurotsuchi, K., Tonomura, O., Morikawa, T., Kinoshita, M., Fujisaki, Y., Matsuzaki, N., Hanzawa, S., Terao, M., Takaura, N., Moriya, H., Iwasaki, T., Moniwa, M., Koga, T.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2006
Subjects
Adhesives
CMOS technology
Crystalline materials
Electrodes
Fabrication
Insulation
Phase change materials
Phase change memory
Plugs
Tunneling
Online AccessGet full text

Cover

More Information
Summary:A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., current and voltage) for the cell is significantly reduced by inserting a very thin Ta 2 O 5 film between GeSbTe (GST) and a W plug. The Ta 2 O 5 interfacial layer works not only as a heat insulator enabling effective heat generation in GST but also as an adhesion layer between GST and SiO 2 underneath. Nonetheless, sufficient current flows through the interfacial layer due to direct tunneling. A low programming power of 1.5 V/100 muA can therefore be obtained even on a W plug with a diameter of 180 nm fabricated using standard 0.13-mum CMOS technology. In addition, the uniformity and repeatability of cell resistance are excellent because of the inherently stable Ta 2 O 5 film properties
ISBN:142440438X
9781424404384
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.2006.346908