Design of an Asynchronous Detector with Priority Encoding Technique
This paper presents an asynchronous detector with priority encoding technique. Conventionally, a normal synchronous detector like an image sensor checks all the outputs of detection cells, whatever the cells are activated or not. Thus, it spends a lot of undesired power consumption. On the contrary,...
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Published in | 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) pp. 529 - 532 |
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Main Authors | , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.07.2017
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Subjects | |
Online Access | Get full text |
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Summary: | This paper presents an asynchronous detector with priority encoding technique. Conventionally, a normal synchronous detector like an image sensor checks all the outputs of detection cells, whatever the cells are activated or not. Thus, it spends a lot of undesired power consumption. On the contrary, an asynchronous detector to only check the activated cells has a small power consumption, even though it has a low operating speed. In order to improve the data transfer rates, a priority encoding technique is described. A test chip to verify the proposed technique has fabricated with 3.3V 0.18um 1-poly 5-metal CMOS process. The effective chip area is 0.345 mm 2 and power consumption is about 8mW. The measured performance shows 65,026 patterns. |
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ISSN: | 2159-3477 |
DOI: | 10.1109/ISVLSI.2017.98 |