Performance of pentacene thin film transistors fabricated with different deposition speeds

Bottom-gated pentacene thin film transistors have been fabricated with different deposition speeds and the devices' current-voltage properties are reported. The pentacene films are formed through evaporation in low pressure. The characteristics of the surface morphologies and microstructures of...

Full description

Saved in:
Bibliographic Details
Published in2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology pp. 1 - 3
Main Authors Hui-Kun Yao, Lei Sun, You-Feng Geng, Yu-Qian Xia, Yi-Jiao Wang, Zhi-Yuan Lun, Tai-Huan Wang, Wen-Tong Zhu, De-Dong Han
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2012
Subjects
electrical properties
evaporation
Logic gates
Organic thin film transistors
Pentacene
Pentacene-TFT
Surface topography
Surface treatment
Online AccessGet full text

Cover

More Information
Summary:Bottom-gated pentacene thin film transistors have been fabricated with different deposition speeds and the devices' current-voltage properties are reported. The pentacene films are formed through evaporation in low pressure. The characteristics of the surface morphologies and microstructures of the samples were studied respectively. We also studied the transfer characteristics and output properties. Pentacene-TFTs can exhibit excellent electrical properties while V g changes from 0 to -70V, and I on /I off ratio is larger than 10 4 and OFF-state current is smaller than -1.3×10 -10 A as V d =-100V.
ISBN:9781467324748
1467324744
DOI:10.1109/ICSICT.2012.6467745