Analysis of array biasing in crosspoint memories for leakage power minimization

• Published in: 2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) pp. 17 - 20
• Main Authors: Belay, Yilkal A., Cabrini, A., Torelli, G.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.06.2017
• Subjects: Memory management; Microprocessors; Power demand; Resistance; Switches; Threshold voltage

Thanks to the recent development of resistance-switching memories, crosspoint array has become an attractive architecture to obtain high-density storage. However, crosspoint arrays suffer from sneak current paths and voltage drops on interconnection lines, which may lead to various challenges such a...