A sub-1V voltage-mode DC-DC buck converter using PWM control technique

• Published in: 2010 IEEE International Conference of Electron Devices and Solid-State Circuits pp. 1 - 4
• Main Authors: Ming-Xiang Lu, Bo-Han Hwang, Jiann-Jong Chen, Yuh-Shyan Hwang
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2010
• Subjects: CMOS integrated circuits; Converters; Radio access networks; Steady-state; Switches
• ISBN: 9781424499977; 1424499976
• DOI: 10.1109/EDSSC.2010.5713791

A sub-1V CMOS DC-DC buck converter with 90% efficiency is presented in this paper. The proposed buck converter uses a digital error amplifier that can make the input voltage lower than other conventional buck converters. The buck converter uses voltage-mode control with pulse width modulation (PWM) techniques. The ramp generator of buck converter uses a Schmitt trigger circuit to replace the bias circuit and comparator. The scheme can reduce the power consumption and improving the power efficiency. The buck converter has been implemented with a 0.18-μm CMOS process. The buck converter is designed and the operating frequency is at 1MHz with the inductor of 4.7-uH and the output capacitor of 47-uF to reduce component size and switching loss. Experimental results prove that the converter can be directly powered with 1-V input voltage and output 0.5-V voltage at 500-mA output current.