A switching linear regulator based on a fast-self-clocked comparator with very low probability of meta-stability and a parallel analog ripple control module

• Published in: 2018 IEEE Custom Integrated Circuits Conference (CICC) pp. 1 - 4
• Main Authors: Kudva, Sudhir S., Song, Sanquan, Poulton, John, Wilson, John, Zhao, Wenxu, Gray, C. Thomas
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.04.2018
• Subjects: Clocks; Regulators; Switches; Transient analysis; Voltage control
• ISSN: 2152-3630
• DOI: 10.1109/CICC.2018.8357021

Point of load regulators, with fast response to load transients, are becoming critical components in low power systems. Linear regulators are an area-efficient way to implement fast-response regulation as they require only the transistors and capacitors available in any standard CMOS process. This paper presents a switching linear regulator with a comparator that samples the difference between the regulated voltage and the reference (error) at 4GHz. The comparator uses a novel self-clocking scheme to achieve extremely low probability of meta-stability, even at very high clock frequency. In fast transient mode, the regulator achieves zero droop when the load current steps from < 1mA to 170mA in 100ps. A digital ripple control mechanism, and an analog ripple control module work together to reduce the ripple on the regulated output. The regulator, fabricated in TSMC's 16nm finFET technology, achieves a peak current efficiency of 97.6% when operating at 4GHz.