Effect of single HALO doped channel in Tunnel FETs: A 2-D modeling study

Tunnel FETs has emerged as a promising candidate to replace the conventional CMOS technology in the near future owing to its sub-60 mV/dec subthreshold slope. In this paper we have explored the effects of asymmetric channel doping in Tunnel FET devices through extensive modeling and simulation appro...

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Bibliographic Details
Published in2010 IEEE International Conference of Electron Devices and Solid-State Circuits pp. 1 - 4
Main Authors Syamal, B, Bose, C, Sarkar, C K, Mohankumar, N
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2010
Subjects
Depletion Width
Halo Doping
Junctions
Semiconductor process modeling
Solid modeling
Solids
Surface Potential
Tunnel FETs
Tunneling
Tunneling Junction
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Summary:Tunnel FETs has emerged as a promising candidate to replace the conventional CMOS technology in the near future owing to its sub-60 mV/dec subthreshold slope. In this paper we have explored the effects of asymmetric channel doping in Tunnel FET devices through extensive modeling and simulation approaches. A Halo doped pocket implantation at the source end is expected to decrease the width of the depletion region resulting in considerable increase in the device current. A compact surface potential model is developed based on the 2-D Poisson's equation followed by the calculation of band energy. The effect of doping of the pocket implantation is studied that helps to optimize the level of HALO doping and thereby, the length of the doped region. The obtained results are compared with a device simulator Sentaurus TCAD and a good agreement is observed.
ISBN:9781424499977
1424499976
DOI:10.1109/EDSSC.2010.5713712