APA (7th ed.) Citation

Homan, M. E. (1961, October). A four-megacycle, 24-bit checked binary adder. 2nd Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1961), 250-265. https://doi.org/10.1109/FOCS.1961.3

Chicago Style (17th ed.) Citation

Homan, M. E. "A Four-megacycle, 24-bit Checked Binary Adder." 2nd Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1961) Oct. 1961: 250-265. https://doi.org/10.1109/FOCS.1961.3.

MLA (9th ed.) Citation

Homan, M. E. "A Four-megacycle, 24-bit Checked Binary Adder." 2nd Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1961), Oct. 1961, pp. 250-265, https://doi.org/10.1109/FOCS.1961.3.