Agile SoC Development with Open ESP : Invited Paper

ESP is an open-source research platform for heterogeneous SoC design. The platform combines a modular tile-based architecture with a variety of application-oriented flows for the design and optimization of accelerators. The ESP architecture is highly scalable and strikes a balance between regularity...

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Bibliographic Details
Published in2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD) pp. 1 - 9
Main Authors Mantovani, Paolo, Giri, Davide, Di Guglielmo, Giuseppe, Piccolboni, Luca, Zuckerman, Joseph, Cota, Emilio G., Petracca, Michele, Pilato, Christian, Carloni, Luca P.
Format Conference Proceeding
LanguageEnglish
Published Association on Computer Machinery 02.11.2020
Subjects
accelerator designs
accelerators
agile SoC development
application-oriented flows
complete SoC
domain-specific automated solutions
ESP architecture
field programmable gate arrays
Hardware
heterogeneous integration platform
heterogeneous SoC design
Linux
Micromechanical devices
modular tile-based architecture
Monitoring
network routing
network-on-chip
open ESP
Open source software
open-source hardware community
open-source research platform
optimization
Registers
SoC
SoC architecture
Sockets
system-level design
system-on-chip
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Summary:ESP is an open-source research platform for heterogeneous SoC design. The platform combines a modular tile-based architecture with a variety of application-oriented flows for the design and optimization of accelerators. The ESP architecture is highly scalable and strikes a balance between regularity and specialization. The companion methodology raises the level of abstraction to system-level design and enables an automated flow from software and hardware development to full-system prototyping on FPGA. For application developers, ESP offers domain-specific automated solutions to synthesize new accelerators for their software and to map complex workloads onto the SoC architecture. For hardware engineers, ESP offers automated solutions to integrate their accelerator designs into the complete SoC. Conceived as a heterogeneous integration platform and tested through years of teaching at Columbia University, ESP supports the open-source hardware community by providing a flexible platform for agile SoC development.
ISSN:1558-2434
DOI:10.1145/3400302.3415753