4 Watt, 45% bandwidth Si-LDMOS high linearity power amplifier for modern wireless communications systems
In this contribution, a Si-LDMOS transistor is used to design a power amplifier (PA) in a broad frequency band covering a number of modern wireless communications systems. The design, implementation, and experimental results of 4 W wideband Si-LDMOS PA are presented. A method based on source/load--p...
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Published in | 2012 2nd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA) pp. 110 - 113 |
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Main Authors | , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.12.2012
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Subjects | |
Online Access | Get full text |
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Summary: | In this contribution, a Si-LDMOS transistor is used to design a power amplifier (PA) in a broad frequency band covering a number of modern wireless communications systems. The design, implementation, and experimental results of 4 W wideband Si-LDMOS PA are presented. A method based on source/load--pull characterization has been used to extract optimum source and load impedances over the desired bandwidth. Following this, a systematic approach to design wideband matching network is suggested. In the frequency band 1.7-2.7 GHz, 3.4 - 4.0 W output power and 25 % drain efficiency were achieved. The 3 rd -order intermodulation distortion (IMD3) performance of the designed PA is evaluated by providing a two-tone signal to the amplifier. At two-tone output power of 1 W, IMD3 of around -30 dBc was measured over the design band. |
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ISBN: | 1467324884 9781467324885 |
DOI: | 10.1109/ICTEA.2012.6462846 |