Damage progression in BGA solder joints during board-level drop test

• Published in: 2011 IEEE 13th Electronics Packaging Technology Conference pp. 681 - 685
• Main Authors: Yamin, A. F. M., Shaffiar, N. M., Loh, W. K., Tamin, M. N.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2011
• Subjects: Electronics packaging; Finite element methods; Load modeling; Loading; Soldering; Strain; Stress
• ISBN: 9781457719837; 1457719835
• DOI: 10.1109/EPTC.2011.6184504

This study examines the dynamic fracture propagation experienced by critical solder joints in a BGA test package during board-level single drop test. An Input-G loading method is employed to simulate a drop test condition with a peak acceleration of 1500G within a time duration of 0.5 ms. Unified inelastic strain model (Anand) describes the strain rate-dependent response of the SAC405 solder material. Damage process in the brittle solder/intermetallic (IMC) interface is predicted using cohesive zone model. Results show that the first board deflection mode induces tensile stresses on the BGA package. The most critically strained solder joint only begins to experience the load (stress) at 0.06 ms following the applied impulse load. Calculated stress can reach up to 68 MPa at such high impact straining rate. The highest inelastic strain rate experienced by the most critical solder joint is 66.7 sec -1 , thus solder/IMC interface fracture is likely the dominant fracture mode, as observed experimentally. Limited propagation of fracture region is predicted during the simulated single board-level drop test. However, damage is predicted to propagate earlier in solder joints located along the outer row of the array parallel to the shorter length of the test board. The shape of the interface crack front can be inferred from the contour of damage/undamage solder/IMC interface region of fractured solder joints.