Accelerating full-system simulation and app analysis through focused multi-granularity profiling

Faced with the rapid divergence of hardware used on embedded devices, there is a need for a tool that can efficiently assist with hardware/software co-design and architecture verification. Speeding up those ESL phases greatly reduces the length of development periods. To address this issue, our work...

Full description

Saved in:
Bibliographic Details
Published inProceedings of the 2014 Electronic System Level Synthesis Conference (ESLsyn) pp. 1 - 6
Main Authors Tzu-Hsiang Su, Wei-Shan Wu, Chen-Te Chou, Yuan-Chun Cheng, Meng-Ting Tsai, Tien-Fu Chen
Format Conference Proceeding
LanguageEnglish
Published European Electronic Chips & Systems design ECSI 01.05.2014
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Faced with the rapid divergence of hardware used on embedded devices, there is a need for a tool that can efficiently assist with hardware/software co-design and architecture verification. Speeding up those ESL phases greatly reduces the length of development periods. To address this issue, our work implements a novel multi-granularity tracer for Android's simulator to provide ESL hardware design performance analysis and verification. In addition, we propose a flexible ESL module interface for system hardware designers to explore new hardware components via simple modules. Our work also enables software developers to identify performance bottleneck and assess software performance of new hardware components. Our case studies and experimental results show that our multi-granularity Android tracer can strip away irrelevant information to shave time off the architecture development period.
DOI:10.1109/ESLsyn.2014.6850378