80dBm∼0dBm dynamic range, 30mV/dB detection sensitivity piecewise RSSI for SDR/CR receivers

• Published in: 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS) pp. 89 - 92
• Main Authors: Xinwang Zhang, Baoyong Chi, Bingqiao Liu, Zhihua Wang
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.08.2014
• Subjects: CMOS integrated circuits; cognitive radio; Dynamic range; Gain; Limiting; Receivers; Rectifiers; RSSI; Sensitivity; software-defined radio
• ISBN: 9781479941346; 1479941344
• ISSN: 1548-3746; 1558-3899
• DOI: 10.1109/MWSCAS.2014.6908359

A high dynamic range, high detection sensitivity piecewise RSSI (received signal strength indicator) for software-defined radio (SDR) and cognitive radio (CR) receivers is proposed. With the reconfigurable limiting amplifiers, the RSSI achieves wide dynamic range and high detection sensitivity simultaneously. Two-path I/Q configuration RSSI structure is adopted to reduce the output voltage glitch. The transfer curve of the RSSI keeps stable under various PVT variations with the help of the self-adaptive bias circuit. The proposed RSSI has been implemented in 65nm CMOS and occupies 0.06 mm 2 chip area. It consumes a scalable current from 1mA to 2.4mA from 1.2V power supply, dependent on the limiting amplifier setting. The simulated results show that the RSSI can detect the signal strength from -80dBm to 0dBm with 30mV/dB detection sensitivity and maximum 1.4dB linearity error over 100KHz~20MHz input carrier frequency range.