Recurrent mechanism developments in the data-flow computer architecture

This paper covers non-conventional recurrent data-flow architecture, its features, and implementation aspects. Recurrence - the main feature of the new architecture efficiently solves data redundancy problem, typical for data-flow architectures while increasing performance. Conventional recurrence i...

Full description

Saved in:
Bibliographic Details
Published in2018 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (EIConRus) pp. 1413 - 1418
Main Authors Shikunov, Yury, Stepchenkov, Yury, Khilko, Dmitry
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.01.2018
Subjects
Computer architecture
data redundancy
data-flow architecture
Hardware
Programming
Prototypes
recurrence
Redundancy
Software
Task analysis
Online AccessGet full text

Cover

More Information
Summary:This paper covers non-conventional recurrent data-flow architecture, its features, and implementation aspects. Recurrence - the main feature of the new architecture efficiently solves data redundancy problem, typical for data-flow architectures while increasing performance. Conventional recurrence implementation has an overhead of configuration operand insertion that provides required functional fields (tags). Functional capabilities expansion of the architecture mechanism implementing this feature resulted in further efficiency by eliminating said overhead in some instances. We cover enhancements implemented in multicore recurrent data-flow architecture, designed to increase the versatility of recurrent computational process utilization. We compare Viterbi algorithm implementations with and without enhancements.
ISBN:9781538643396
1538643391
DOI:10.1109/EIConRus.2018.8317362