Crosstalk Noise Variation Assessment and Analysis for the Worst Process Corner

As the relative levels of coupling capacitance in smaller process geometries and of process variations caused due to lithography, CMP, and Etch process increases, process variation aware coupled noise analysis is becoming more important especially at under 45 nm design and below. We propose a method...

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Bibliographic Details
Published in9th International Symposium on Quality Electronic Design (isqed 2008) pp. 352 - 356
Main Authors Jae-Seok Yang, Neureuther, A.R.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.03.2008
Subjects
Capacitance
Crosstalk
Driver circuits
Fluctuations
Geometry
Lithography
noise
Noise generators
Noise level
Noise shaping
signal integrity
Testing
variation
worst corner
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Summary:As the relative levels of coupling capacitance in smaller process geometries and of process variations caused due to lithography, CMP, and Etch process increases, process variation aware coupled noise analysis is becoming more important especially at under 45 nm design and below. We propose a method to simulate crosstalk noise for the worst process corner cases. Our method considers a spatial correlation for transistor length variations because the difference of the driver strength between victim and aggressor is the main source of the variation. Both lithography and CMP variation are first considered separately and combined to show crosstalk noise change for interconnect variations. We compare results for various process variation models using a crosstalk test structure. In these simulation studies, crosstalk noise without variation consideration underestimates by up to 17% the noise of the proposed worst corner model.
ISBN:9780769531175
0769531172
ISSN:1948-3287
1948-3295
DOI:10.1109/ISQED.2008.4479755