Techniques for the diagnosis of switching circuit failures
In 2.12 minutes an IBM 7090 program found four input tests (for an 8-input parity check circuit) whose outcome determines whether any one of 102 possible failures occurred. For any single-output combinational circuit, with no more than 35 input variables, the program computes the set of all inputs d...
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Published in | 2nd Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1961) pp. 152 - 160 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.10.1961
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Subjects | |
Online Access | Get full text |
DOI | 10.1109/FOCS.1961.33 |
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Summary: | In 2.12 minutes an IBM 7090 program found four input tests (for an 8-input parity check circuit) whose outcome determines whether any one of 102 possible failures occurred. For any single-output combinational circuit, with no more than 35 input variables, the program computes the set of all inputs detecting a given failure - the essential novelty of the method. These sets, one for each failure, are then Processed to find a (small) subset of tests which detect any failure. The underlying method extends to the diagnosis of circuits with feedback. |
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DOI: | 10.1109/FOCS.1961.33 |