Design XOR gate with SETMOS technology

Increasing the number of transistors on a single chip, results increased power consumption in digital circuits. There is a very urgent need to use sush components that has very low dimensions to speed up and improve the power consumption. The single-electron transistor (SET) can be a good alternativ...

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Bibliographic Details
Published in2015 International Congress on Technology, Communication and Knowledge (ICTCK) pp. 478 - 481
Main Authors Shahri, Maryam Sadat Jalali, Talebiyan, Seyyed Reza
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.11.2015
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Summary:Increasing the number of transistors on a single chip, results increased power consumption in digital circuits. There is a very urgent need to use sush components that has very low dimensions to speed up and improve the power consumption. The single-electron transistor (SET) can be a good alternative For CMOS transistors. SET is a nano particle sized dimension. In this paper, regarding the application of XOR gate in computational circuits and its different implementation with CMOS logic, XOR gate is implemented by a combination of SET and CMOS transistors and its performance is compared to CMOS logic.
DOI:10.1109/ICTCK.2015.7582715