A 2.6mW 370MHz-to-2.5GHz Open-Loop Quadrature Clock Generator

In this paper, a wide frequency open-loop quadrature generator is sufficiently compact to allow many stages to be cascaded affordably. The generator is built from cascaded quad corrector stages, each of which in turn, can be understood as a modification of a common interpolating 4-stage ring oscilla...

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Bibliographic Details
Published in2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers pp. 458 - 627
Main Authors Kim, Kyu-hyoun, Coteus, Paul W., Dreps, Daniel, Kim, Seongwon, Rylov, Sergey V., Friedman, Daniel J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.02.2008
Subjects
Circuit simulation
Clocks
Cutoff frequency
Delay
Design optimization
Inverters
Power harmonic filters
Predictive models
Ring oscillators
Transceivers
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Summary:In this paper, a wide frequency open-loop quadrature generator is sufficiently compact to allow many stages to be cascaded affordably. The generator is built from cascaded quad corrector stages, each of which in turn, can be understood as a modification of a common interpolating 4-stage ring oscillator. In the circuit, the delay of each stage is a linear superposition of the delays Phi of the associated inner and outer loop elements. If the outer loop element inputs are made independent, the driven oscillator is resulted. Provided the input drive is sufficient, the frequency of the driven oscillator is that of the driving input, and the phase of each internal node is an interpolation of the phase of its input drive and the phase of the preceding stage. This interpolation acts to average offsets from quadrature in the incoming phases. If the input drive is insufficient, the oscillator will run near its natural or unloaded frequency, omega 0 =2pif o .
ISBN:1424420105
9781424420100
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2008.4523255