Preprocessing techniques for first-order clausification

It is well known that preprocessing is crucial for efficient reasoning on large industrial problems. Although preprocessing is well developed for propositional logic, it is much less investigated for first-order logic. In this paper we introduce several preprocessing techniques for simplifying first...

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Bibliographic Details
Published in2012 Formal Methods in Computer-Aided Design (FMCAD) pp. 44 - 51
Main Authors Hoder, Krystof, Khasidashvili, Z., Korovin, K., Voronkov, A.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2012
Subjects
Boolean functions
Cognition
Data structures
Design automation
Encoding
Hardware
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Summary:It is well known that preprocessing is crucial for efficient reasoning on large industrial problems. Although preprocessing is well developed for propositional logic, it is much less investigated for first-order logic. In this paper we introduce several preprocessing techniques for simplifying firstorder formulas aimed at improving clausification. These include definition inlining and merging, simplifications based on a new data structure, quantified AIG, and its combination with BDDs. We implemented our preprocessing methods and evaluated them over encodings of industrial hardware verification problems into the effectively propositional (EPR) fragment of first-order logic and over standard first-order (TPTP) and SMT (SMT-LIB) benchmarks. We also investigated preprocessing methods that help obtain EPR-resulting clausification in cases where standard clausification would lead outside the EPR fragment. We demonstrate that our methods enable one to considerably reduce the number of clauses obtained after clausification and by that help speedup first-order reasoning.
ISBN:1467348325
9781467348324