Researchon Mechanical Behavior of Through silicon via of 2.5D Interposer

In this paper, the mechanical behavior of the 2.5D interposer was investigated under the thermodynamic loading of −65~150 °C temperaturecycle and 150 °C high temperature storage. It was found that cracks first appeared at the interface between the copper wiring layer and the passivation layer after...

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Bibliographic Details
Published in2018 19th International Conference on Electronic Packaging Technology (ICEPT) pp. 913 - 918
Main Authors Yang, Jun, Yao, Quanbin, Lin, Pengrong, Xie, Xiaochen, Lian, Binhao
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2018
Subjects
Copper
CTE
Mechanical behavior
Passivation
Silicon
Stress
Surface cracks
Temperature cycle
Through-silicon vias
TSV interposer
Wiring
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Summary:In this paper, the mechanical behavior of the 2.5D interposer was investigated under the thermodynamic loading of −65~150 °C temperaturecycle and 150 °C high temperature storage. It was found that cracks first appeared at the interface between the copper wiring layer and the passivation layer after 500 temperature cycles. With the increasement of temperature cycles, the upper cracks propagated laterally and some cracks converged, causing the surface passivation layer to peel off. Finally, the stress resulted from the expansion of Cu pillar in the through-silicon via (TSV)during the temperature cycling caused the separation of the wiring layer and the passivation layer, which is the main reason for the formation of crack initiation, due to the fact that the coefficient of the thermal expansion(CTE) of copper is larger than that of silicon. In addition, the effects of copper wiring and TSV pitch on stress and cracks were also investigated in this paper.
DOI:10.1109/ICEPT.2018.8480560