13.3 A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique

• Published in: Digest of technical papers - IEEE International Solid-State Circuits Conference pp. 214 - 216
• Main Authors: Wei, Liqiong, Alzate, Juan G., Arslan, Umut, Brockman, Justin, Das, Nilanjan, Fischer, Kevin, Ghani, Tahir, Golonzka, Oleg, Hentges, Patrick, Jahan, Rawshan, Jain, Pulkit, Lin, Blake, Meterelliyoz, Mesut, OrDonnell, Jim, Puls, Conor, Quintero, Pedro, Sahu, Tanaya, Sekhar, Meenakshi, Vangapaty, Ajay, Wiegand, Chris, Hamzaoglu, Fatih
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2019
• Subjects: Bit error rate; Clamps; FinFETs; Metals; Resistors; Temperature sensors
• ISSN: 2376-8606
• DOI: 10.1109/ISSCC.2019.8662444

STT-MRAM has been emerging as a very-promising high-density embedded non-volatile memory (eNVM) [1], [2]. Embedded Flash memory has been the leading eNVM technology, but STT-MRAM has been developed as a better solution for continuing scaling, speed and cost. This paper presents a write-verify-write (WvW) scheme and a programmable offset cancellation sensing technique that achieves a high-yield, high-performance and high-endurance 7Mb STT-MRAM arrays in a 22FFL FinFET technology [3]. The developed technology supports a wide range of operating temperatures between -40- 105 ^{\circ}\mathrm {C}. Compared to prior-art [4], [5], the two-stage current-sensing technique with a die-by-die tuning of thin-film precision resistor that is used as a reference can significantly improve the sensing margin during verify and read operations. Read disturb for reference cells is eliminated as there is no MTJ in the reference path.