Pipelining high-radix SRT division algorithms

This paper shows various ways to pipeline popular SRT division algorithms. Different logic gate families and circuit structures are used to explore possible overheads introduced in each implementation. Simulation results are compared to find out the fastest possible architecture and comparisons are...

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Bibliographic Details
Published in2007 50th Midwest Symposium on Circuits and Systems pp. 309 - 312
Main Authors Upadhyay, S., Stine, J.E.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2007
Subjects
Algorithm design and analysis
Ambient intelligence
CMOS logic circuits
CMOS technology
Computational modeling
Hardware
Latches
Logic circuits
Logic gates
Pipeline processing
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Summary:This paper shows various ways to pipeline popular SRT division algorithms. Different logic gate families and circuit structures are used to explore possible overheads introduced in each implementation. Simulation results are compared to find out the fastest possible architecture and comparisons are explored from parasitically extracted AMI C5N 0.5 mum layouts.
ISBN:1424411750
9781424411757
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2007.4488595