An FPGA implementation of complex valued independent component analysis for real-time interference canceler

• Published in: 2011 IEEE MTT-S International Microwave Workshop Series on Innovative Wireless Power Transmission: Technologies, Systems, and Applications pp. 161 - 164
• Main Authors: Shiomi, Hidehisa, Fujio, S., Okamura, Y.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2011
• Subjects: Antenna arrays; Arrays; Constellation diagram; Field programmable gate arrays; Independent component analysis; Interference; Signal to noise ratio
• ISBN: 9781612842141; 1612842143
• ISSN: 2157-362X; 2157-362X
• DOI: 10.1109/IMWS.2011.5877113

This paper describes the demonstration of ICA (Independent Component Analysis) processor for radio applications. ICA determines the weighting vector of the array antenna to eliminate undesired arriving signals without any teaching signals. We believe that the ICA is useful to DOA estimation of the pilot signal from the Earth. In order to reduce dissipation power and to achieve higher processing speed, the ICA processor using FPGA or ASIC is strongly required. At first, fundamental theory of the ICA is described. Next, a fabricated processor and experimental system will be shown. The 4 element monopole array was used. The carrier frequency was 2.45GHz and the symbol-rate of pilot signals were 10kSym-bol/s. The receiver was received the single pilot signal with 3 undesired interferences. The fabricated processor estimate the separation weight every 262μs. Finally, the experimental results will demonstrate. Compared with typical procedure using measured channel matrix, ICA was recovered the SNR of 4 dB grater than typical method.