2D carrier profiles by SSRM and TCAD for root cause analysis of low Vt PFET

Analysis of ultra-shallow junctions has become a critical requirement especially in the advent of new 3D device structures and technologies. Information derived from available traditional tools and concepts is no longer sufficient for use in TCAD tools for device performance optimization. Furthermor...

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Bibliographic Details
Published in2017 17th International Workshop on Junction Technology (IWJT) pp. 31 - 33
Main Authors Nxumalo, J. N., Wang, Y. Y., Krishnasamy, R., Katnani, A.
Format Conference Proceeding
LanguageEnglish
Published JSAP 01.06.2017
Subjects
Doping profiles
Electrical resistance measurement
Immune system
Junctions
Resistance
Semiconductor device measurement
Two dimensional displays
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Summary:Analysis of ultra-shallow junctions has become a critical requirement especially in the advent of new 3D device structures and technologies. Information derived from available traditional tools and concepts is no longer sufficient for use in TCAD tools for device performance optimization. Furthermore, the complex geometry and nanometer scale critical dimensions of current and future technology node devices impose very stringent requirements on characterization and metrology tools. Although not usually viewed as a critical requirement, sample preparation in FINFET characterization of dopant profiles is just as critical as the technique to be employed for the analysis.
DOI:10.23919/IWJT.2017.7966506