Boolean matching algorithms
The authors consider the problem of detecting the equivalence of two single-output Boolean functions, considering the permutation and complementation of their inputs, complementation of outputs, and associated don't-care sets, which is often referred to as the Boolean matching problem. Boolean...
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Published in | 1993 International Symposium on VLSI Technology, Systems, and Applications Proceedings of Technical Papers pp. 44 - 48 |
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Main Authors | , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
1993
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Subjects | |
Online Access | Get full text |
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Summary: | The authors consider the problem of detecting the equivalence of two single-output Boolean functions, considering the permutation and complementation of their inputs, complementation of outputs, and associated don't-care sets, which is often referred to as the Boolean matching problem. Boolean matching is a verification problem, and it has important applications in logic synthesis problems such as technology-mapping. Several new approaches are presented for solving the Boolean matching problem. The features and efficiency of these algorithms are discussed. The author also compare with an existing Boolean matching algorithm by applying them to the technology-mapping of cell based designs.< > |
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ISBN: | 0780309782 9780780309784 |
ISSN: | 1524-766X 2690-8174 |
DOI: | 10.1109/VTSA.1993.263624 |