Analog and digital performance of MISFETs on p- and n-GaInAs

GaInAs MISFETs with pyrolytic SiO/sub 2/ isolator on n- and p-GaInAs have been investigated with regard to analog and digital performance. The 1.7- mu m gate length MISFETs on n-GaInAs and p-GaInAs have transconductances of 100 mS/mm and 40 mS/mm, cutoff frequencies (f/sub T/) of 14 GHz and 2 GHz, a...

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Published inLEOS 1992 Summer Topical Meeting Digest on Broadband Analog and Digital Optoelectronics, Optical Multiple Access Networks, Integrated Optoelectronics, and Smart Pixels pp. 503 - 506
Main Authors Schulte, F., Werres, C., Splettstosser, J., Schmitz, D., Tuzinski, R., Heime, K., Beneking, H.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1992
Subjects
Carrier confinement
Cutoff frequency
Delay effects
Inverters
Isolation technology
Isolators
MISFETs
Reproducibility of results
Ring oscillators
Voltage-controlled oscillators
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Summary:GaInAs MISFETs with pyrolytic SiO/sub 2/ isolator on n- and p-GaInAs have been investigated with regard to analog and digital performance. The 1.7- mu m gate length MISFETs on n-GaInAs and p-GaInAs have transconductances of 100 mS/mm and 40 mS/mm, cutoff frequencies (f/sub T/) of 14 GHz and 2 GHz, and maximum frequencies of oscillation (f/sub max/) of 18 GHz and 6 GHz, respectively. Due to the self-aligned process and the better carrier confinement, the MISFETs on p-GaInAs show higher f/sub max//f/sub T/ values. An inverter on p-GaInAs with a high static voltage gain of -13.5 and high noise margin has been integrated to a 31-stage ring oscillator, proving the reproducibility of the technology with a pyrolytic SiO/sub 2/ isolator. The delay time of one stage is 6 ns, corresponding to an intrinsic frequency of 200 MHz, which shows that the operation point of the ring oscillator is not optimized.< >
ISBN:0780305221
9780780305229
DOI:10.1109/ICIPRM.1992.235641