An efficient low-power binding algorithm in high-level synthesis

• Published in: 2002 IEEE International Symposium on Circuits and Systems (ISCAS) Vol. 4; p. IV
• Main Authors: Yoonseo Choi, Taewhan Kim
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2002
• Subjects: Computer networks; Computer science; Cost function; High level synthesis; Portable computers; Power dissipation; Processor scheduling; Registers; Scheduling algorithm; Very large scale integration
• ISBN: 9780780374485; 0780374487
• DOI: 10.1109/ISCAS.2002.1010455

We propose an efficient binding algorithm for power optimization in high-level synthesis. In prior work, it has been shown that several binding problems for low-power can be formulated as multi-commodity flow problems (due to an iterative execution of data flow graph) and be solved optimally. However, since the multi-commodity flow problem is NP-hard, the application is limited to a class of small sized problems. To overcome the limitation, we address the problem of how we can effectively make use of the property of efficient flow computations in a network so that it is extensively applicable to practical designs while producing close-to-optimal results. To this end, we propose an efficient two-step algorithm, which (1) determines a feasible binding solution by partially utilizing the computation steps for finding a maximum flow of minimum cost in a network and then (2) refines it iteratively. Experiments with a set of benchmark examples show that the proposed algorithm saves the run time significantly while maintaining close-to-optimal bindings in most practical designs.