A 10-mW 435-MHz differential CMOS LNA for low-IF receivers in space applications
A low-power 435 MHz differential low-noise amplifier with on-chip spiral inductors was implemented in a 0.5 /spl mu/m standard CMOS process. The LNA is intended for use in a low-power low-IF receiver under development for deep space communication. A current reuse technique is employed for low-power...
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Published in | 2002 IEEE International Symposium on Circuits and Systems (ISCAS) Vol. 4; p. IV |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
2002
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Subjects | |
Online Access | Get full text |
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Summary: | A low-power 435 MHz differential low-noise amplifier with on-chip spiral inductors was implemented in a 0.5 /spl mu/m standard CMOS process. The LNA is intended for use in a low-power low-IF receiver under development for deep space communication. A current reuse technique is employed for low-power operation. Low-noise layout techniques are used to improve the noise performance. Design trade-offs to achieve low-power and low-noise at UHF frequencies are addressed. The LNA has a noise figure of 0.94 dB, input 1 dB compression point of -32 dBm, input third-order intercept point of -27 dBm and forward gain of 25 dB. The active area of the LNA is 1.3 mm/spl times/1.1 mm. |
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ISBN: | 9780780374485 0780374487 |
DOI: | 10.1109/ISCAS.2002.1010381 |