35 GHz InGaAs HEMT MMIC downconverter
The design and development of a 35 GHz HEMT (high electron mobility transistor) MMIC (monolithic microwave integrated circuit) downconverter are reported. This completely monolithic chip consists of a balanced two-stage low-noise amplifier (LNA) cascaded with a singly balanced (HEMT compatible) diod...
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Published in | IEEE 1991 Microwave and Millimeter-Wave Monolithic Circuits Symposium. Digest of Papers pp. 47 - 50 |
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Main Authors | , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
1991
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Subjects | |
Online Access | Get full text |
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Summary: | The design and development of a 35 GHz HEMT (high electron mobility transistor) MMIC (monolithic microwave integrated circuit) downconverter are reported. This completely monolithic chip consists of a balanced two-stage low-noise amplifier (LNA) cascaded with a singly balanced (HEMT compatible) diode mixer. Conversion gain of 5 dB over a 20 to 100 MHz IF (intermediate frequency) output with an RF frequency of 35 GHz and an LO (local oscillator) frequency=RF+IF has been measured. In addition to the downconverter macrocell, the LNA and mixer designs were fabricated as individual microcells. The LNA has demonstrated state-of-the-art performance: the measured noise figure from 34 to 40 GHz is less than 2.8 dB. Associated gain is 14.0+/-0.4 dB over a 30 to 40 GHz bandwidth. Input and output voltage standing wave ratio is better than 1.2:1. The singly balanced mixer exhibited conversion loss of less than 5 dB.< > |
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ISBN: | 9780780300873 0780300874 |
DOI: | 10.1109/MCS.1991.148085 |