Built-in self-test for GHz embedded SRAMs using flexible pattern generator and new repair algorithm

This paper presents a built-in self-test (BIST) scheme, which consists of a flexible pattern generator and a practical on-macro two-dimensional redundancy analyzer, for GHz embedded SRAMs. In order to meet the system requirements and to detect a wide variety of faults or performance degradation resu...

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Bibliographic Details
Published inInternational Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034) pp. 301 - 310
Main Authors Nakahara, S., Higeta, K., Kohno, M., Kawamura, T., Kakitani, K.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1999
Subjects
Automata
Built-in self-test
Circuit faults
Circuit testing
Degradation
Hardware
Pattern analysis
Random access memory
Redundancy
Test pattern generators
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Summary:This paper presents a built-in self-test (BIST) scheme, which consists of a flexible pattern generator and a practical on-macro two-dimensional redundancy analyzer, for GHz embedded SRAMs. In order to meet the system requirements and to detect a wide variety of faults or performance degradation resulting from recent technology advances, the microcode-based pattern generator can generate flexible patterns. A practical new repair algorithm for the Finite State Machine (FSM)-based on-macro redundancy analyzer is also presented. It can be implemented with simple hardware and can show fairly good performance compared with conventional software-based algorithms.
ISBN:0780357531
9780780357532
ISSN:1089-3539
2378-2250
DOI:10.1109/TEST.1999.805644