600 MHz digitally controlled BiCMOS oscillator (DCO) for VLSI signal processing and communication applications
A 16-bit digitally controlled BiCMOS ring oscillator (DCO) is described. This BiCMOS DCO design provides improved frequency stability under thermal fluctuations. Simulations of a 5-stage DCO using 1 /spl mu/m BiCMOS process parameters achieved controllable frequency range of 90-640 MHz with a linear...
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Published in | Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) pp. 71 - 76 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
1998
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Subjects | |
Online Access | Get full text |
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Summary: | A 16-bit digitally controlled BiCMOS ring oscillator (DCO) is described. This BiCMOS DCO design provides improved frequency stability under thermal fluctuations. Simulations of a 5-stage DCO using 1 /spl mu/m BiCMOS process parameters achieved controllable frequency range of 90-640 MHz with a linear/quasi-linear range of around 300 MHz. Monotone frequency gain (frequency vs control-word transfer function) with fine stepping (tuning) in several KHz was verified This augurs the prospect of accurate frequency lock in a BiCMOS all digital PLL (ADPLL) application in digital VLSI communication systems. Worstcase jitter due to digital control transitions at pathological control-word boundaries for the BiCMOS DCO was observed to be less than 50 ps, which is lower than that for the CMOS DCO. |
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ISBN: | 0818684097 9780818684098 |
ISSN: | 1066-1395 |
DOI: | 10.1109/GLSV.1998.665202 |