High voltage pullup devices in a BiMOS HVIC technology

High-voltage complementary pullup and pulldown devices have been fabricated in a high-voltage integrated circuit process that is based on thin epitaxial layers (<10 mu m). The device structures described allow high-voltage pullup devices to be realized where normally only pulldown devices would b...

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Bibliographic Details
Published inTechnical Digest., International Electron Devices Meeting pp. 800 - 803
Main Authors Scott, R.S., Pattanayak, D.N., Kohl, J.E., Adler, M.S., Ahle, R.S., Wildi, E.J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1988
Subjects
Avalanche breakdown
Driver circuits
Epitaxial layers
Integrated circuit technology
Isolation technology
MOS devices
Research and development
Substrates
Switches
Voltage
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Summary:High-voltage complementary pullup and pulldown devices have been fabricated in a high-voltage integrated circuit process that is based on thin epitaxial layers (<10 mu m). The device structures described allow high-voltage pullup devices to be realized where normally only pulldown devices would be possible in such thin epitaxial layers. Only one additional mask was needed to incorporate these devices into the existing junction-isolated BiMOS technology. A 400-V chip featuring in high-voltage, low-power consumption drivers along with 5-V CMOS logic has been fabricated using novel depletion-mode NMOS design.< >
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.1988.32932