5.2 Distributed system of digitally controlled microregulators enabling per-core DVFS for the POWER8TM microprocessor

• Published in: 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) pp. 98 - 99
• Main Authors: Toprak-Deniz, Zeynep, Sperling, Michael, Bulzacchelli, John, Still, Gregory, Kruse, Ryan, Seongwon Kim, Boerstler, David, Gloekler, Tilman, Robertazzi, Raphael, Stawiasz, Kevin, Diemoz, Timothy, English, George, Hui, David, Muench, Paul, Friedrich, Joshua
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2014
• Subjects: Loading; Logic gates; Microprocessors; Program processors; Regulators; Voltage control; Voltage measurement
• ISBN: 1479909181; 9781479909186
• ISSN: 0193-6530; 2376-8606
• DOI: 10.1109/ISSCC.2014.6757354

Integrated voltage regulator modules (iVRMs) [1] provide a cost-effective path to realizing per-core dynamic voltage and frequency scaling (DVFS), which can be used to optimize the performance of a power-constrained multi-core processor. This paper presents an iVRM system developed for the POWER8™ microprocessor, which functions as a very fast, accurate low-dropout regulator (LDO), with 90.5% peak power efficiency (only 3.1% worse than an ideal LDO). At low output voltages, efficiency is reduced but still sufficient to realize beneficial energy savings with DVFS. Each iVRM features a bypass mode so that some of the cores can be operated at maximum performance with no regulator loss. With the iVRM area including the input decoupling capacitance (DCAP) (but not the output DCAP inherent to the cores), the iVRMs achieve a power density of 34.5W/mm 2 , which exceeds that of inductor-based or SC converters by at least 3.4× [2].