Toward Low Soft Error Sensitivity and Latency Near Memory Computing with EB MRAM

Magnetic random-access memory (MRAM) suffers from reliability issues subject to the harsh industrial environment and applications with limited hardware resources. Thus, we propose the new spin-orbit torque MRAM (SOT-MRAM) scheme called exchange bias (EB) MRAM for error-tolerant application. EB MRAM...

Full description

Saved in:
Bibliographic Details
Published in2023 IEEE International Magnetic Conference - Short Papers (INTERMAG Short Papers) pp. 1 - 2
Main Authors Li, Yueting, Zhu, Daoqian, Wang, Jinkai, Zhang, Yue, Zhao, Weisheng
Format Conference Proceeding
LanguageEnglish
Published IEEE 15.05.2023
Subjects
Computer architecture
Cross layer design
EB MRAM
Error-tolerant Application
Hardware
Near Memory Computing
Performance evaluation
Reliability
Sensitivity
SOT-MRAM
Torque
Online AccessGet full text

Cover

More Information
Summary:Magnetic random-access memory (MRAM) suffers from reliability issues subject to the harsh industrial environment and applications with limited hardware resources. Thus, we propose the new spin-orbit torque MRAM (SOT-MRAM) scheme called exchange bias (EB) MRAM for error-tolerant application. EB MRAM enhances reliability from its immunity to external magnetic and higher endurance. In addition, this paper presents near-memory computing (NMC) with EB MRAM to further achieve low soft error sensitivity and latency implementation. In the proposed scheme, the NMC controller exploits the accelerated design to reduce data movement, and EB MRAM as the computation memory is performed with subword-level compression. The experimental results show that the access time and energy of EB MRAM is only 0.9ns and 0.113pJ/bit while the data compressed rate is up to 75% with 2.05% loss over the state-of-the-art designs.
DOI:10.1109/INTERMAGShortPapers58606.2023.10305067