Low-energy asynchronous memory design

We introduce the concept of energy per operation as a measure of performance of an asynchronous circuit. We show how to model energy consumption based on the high-level language specification. This model is independent of voltage and timing considerations. We apply this model to memory design. We sh...

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Bibliographic Details
Published inProceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems pp. 176 - 185
Main Authors Tierno, J.A., Martin, A.J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1994
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Summary:We introduce the concept of energy per operation as a measure of performance of an asynchronous circuit. We show how to model energy consumption based on the high-level language specification. This model is independent of voltage and timing considerations. We apply this model to memory design. We show first how to dimension a memory array, and how to break up this memory array into smaller arrays to minimize the energy per access. We then show how to use cache memory and pre-fetch mechanisms to further reduce energy per access.
ISBN:9780818662102
0818662107
DOI:10.1109/ASYNC.1994.656310